Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1998-03-04
2000-03-14
Loke, Steven H.
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257903, 257904, H01L 2976, H01L 2411
Patent
active
060376384
ABSTRACT:
The gates 31, 32, 33 and 34 of a pair of driver transistors Q1, Q2 and a pair of address-selecting transistors Q3, Q4 are arranged so as to be perpendicular to bit lines BL, /BL. The drain regions of the driver transistors Q1, Q2 forming a flip-flop are arranged point-symmetrically around an element isolating region. The source regions of the driver transistors Q1, Q2 are arranged point-symmetrically. Similarly, the address-selecting transistors Q3, Q4 are arranged point-symmetrically. An upper wiring layer connected to two gates of the transistors are arranged so as to be perpendicular to the bit lines BL, /BL. Two Vss lines are formed in the same layer as that for the bit lines BL, /BL and arranged on both sides of the bit lines BL, /BL in parallel thereto. The Vss lines are connected to the source regions of the driver transistors. With this construction, the bi-stability of a memory cell used for a semiconductor memory device, such as a SRAM, is improved, so that the low-voltage operation and the hold characteristic are improved and software errors are removed. In addition, the aspect ratio of the cell is changed from the aspect ratio of a conventional, longitudinally extending cell to the aspect ratio of a laterally extending cell, so that the lengths of the bit lines are decreased to achieve a high speed operation.
REFERENCES:
patent: 5818089 (1998-10-01), Kokubo et al.
Abe Mitsuhiro
Segawa Makoto
Suzuki Yoichi
Kabushiki Kaisha Toshiba
Loke Steven H.
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