Static information storage and retrieval – Read/write circuit – Testing
Patent
1988-08-04
1991-02-05
Popek, Joseph A.
Static information storage and retrieval
Read/write circuit
Testing
365149, 371 211, B11C 2900, G06F 1122
Patent
active
049911392
ABSTRACT:
A semiconductor memory device is provided which includes a plurality of data lines coupled to memory cells and to a detecting arrangement for detecting if logical levels of each of the data lines coincide to each other or not. A test read arrangement is also provided which stores the same information, in advance, in plural memory cells so that if there is a defect in one of the memory cells, this can be detected by the detecting arrangement.
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patent: 4138740 (1979-02-01), Itoh
patent: 4654849 (1987-03-01), White, Jr. et al.
patent: 4686456 (1987-08-01), Furuyama et al.
patent: 4811299 (1989-03-01), Miyazawa et al.
patent: 4916700 (1990-04-01), Ito et al.
Ishihara Masamichi
Kajigaya Kazuhiko
Sakuta Toshiyuki
Takahashi Yasushi
Hitachi , Ltd.
Popek Joseph A.
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