Structure of semiconductor device

Active solid-state devices (e.g. – transistors – solid-state diode – Fet configuration adapted for use as static memory cell

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257350, H01L 2711

Patent

active

058411992

ABSTRACT:
An SRAM semiconductor device is disclosed in which an access transistor is an nMOS TFT to thereby reduce cell size and to improve low Vcc characteristics. The semiconductor device comprises a gate electrode of a drive transistor formed on the semiconductor substrate, with a first gate insulating film therebetween. A first impurity region is formed on the substrate on opposite sides of the gate electrode of the drive transistor. An insulating film is formed on the entire surface of the substrate and has a contact hole exposing part of the gate electrode of the drive transistor. A semiconductor layer is formed on the insulating film in connection with the gate electrode of the drive transistor through the contact hole; a second gate insulating film is formed on the semiconductor layer; and a gate electrode of an access transistor is formed on the second gate insulating film. Further, a second impurity region is formed in the semiconductor layer on opposite sides of the access transistor gate electrode.

REFERENCES:
patent: 5281843 (1994-01-01), Ochii et al.
patent: 5491654 (1996-02-01), Azuma
patent: 5578854 (1996-11-01), Chen et al.
High Reliability and High Performance 0.35.mu.m Gate-Inverted TFT's for 16Mbit SRAM Applications Using Self-Aligned LDD Structures, C.T. Liu, IEDM 823-826 (1992), Electron Devices of Society of IEEE, Dec. 1992.

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