Semiconductor device manufacturing: process – Introduction of conductivity modifying dopant into... – Ion implantation of dopant into semiconductor region
Patent
1996-09-23
1998-11-24
Everhart, Caridad
Semiconductor device manufacturing: process
Introduction of conductivity modifying dopant into...
Ion implantation of dopant into semiconductor region
438659, 438660, 438647, 438970, H01L 21425
Patent
active
058406182
ABSTRACT:
A method of manufacturing a semiconductor device that does not interfere with electrical connection of a polysilicon interconnection layer to a source/drain region of a transistor. Patterning of the interconnection layer and the gate electrode occurs prior to removal of an underlying oxide film to prevent etching of the substrate. An interconnection layer of amorphous material is formed on the oxide film, and the patterned interconnection layer is subsequently electrically connected to the substrate by introducing ions into the amorphous material to reduce the oxide film underneath the interconnection layer. After introduction of ions into the amorphous layer, the amorphous material is crystallized to increase the conductivity of the interconnection layer.
REFERENCES:
patent: 4502206 (1985-03-01), Schnable et al.
patent: 4769377 (1988-09-01), Maeda
patent: 4904611 (1990-02-01), Chiang et al.
patent: 5290712 (1994-03-01), Sato et al.
patent: 5410174 (1995-04-01), Kalnitsky
patent: 5444283 (1995-08-01), Liang et al.
Everhart Caridad
Kabushiki Kaisha Toshiba
LandOfFree
Method of manufacturing semiconductor device using an amorphous does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of manufacturing semiconductor device using an amorphous , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of manufacturing semiconductor device using an amorphous will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1701589