Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
Patent
1997-09-12
2000-02-08
Chan, Eddie P.
Electrical computers and digital processing systems: memory
Storage accessing and control
Shared memory area
711130, 711158, 710240, 710107, G06F 1318
Patent
active
060237481
ABSTRACT:
A multiple client memory arbitration system to arbitrate client access to a single cache memory in an I/O controller device having at least one internal client in addition to the possibility of at least one external client. The system includes an arbitrator, the ability to determine a configuration type for the I/O controller device selected from a group of configuration types consisting of an unknown device configuration, single device configuration, multiple device master configuration, and multiple device slave configuration, the ability to configure the arbitration device based on a configuration type, the ability to refresh the cache memory independent of the configuration type, and the ability to execute failover control of the cache memory in an event of an I/O controller device failure in a multiple arbitration device configuration.
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Maine Gene
Peters Michael J.
Adaptec, Inc.
Chan Eddie P.
Kim Hong
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