Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1999-05-07
2000-03-14
Chaudhari, Chandra
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438760, 438765, 438776, 438774, H01L 2128
Patent
active
060372583
ABSTRACT:
A method for fabricating a copper interconnect structure, in a damascene type opening, comprised a thick copper layer, obtained via an electro-chemical deposition procedure, and comprised of an underlying, copper seed layer, featuring a smooth top surface topography, has been developed. The smooth top surface topography, of the underlying copper seed layer, is needed to allow the voidless deposition of the overlying, thick copper layer, and is also needed to allow the deposition of the overlying thick copper layer to be realized, with a surface that can survive a chemical mechanical polishing procedure, without the risk of unwanted dishing or spooning phenomena. The desirable, copper seed layer, is obtained via a process sequence that features: a plasma vapor deposition of a first copper seed layer; an argon purge procedure; and a second plasma vapor deposition of a second copper seed layer. The use of an argon purge, allows the increase in temperature, introduced by plasma bombardment, to be decreased, allowing a copper seed layer, featuring a smooth top surface topography, to be obtained.
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Liu Chung-Shi
Yu Chen-Hua
Ackerman Stephen B.
Chaudhari Chandra
Kilday Lisa
Saile George O.
Taiwan Semiconductor Manufacturing Company
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