Memory system

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

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Details

36518503, 36518509, G11C 1156, G11C 1604, G11C 2900

Patent

active

059961082

ABSTRACT:
According to the present invention, a memory system comprises storing section having a plurality of memory elements each of which stores one of n-value storage states corresponding to data "0", "1", . . . , "n-1", and including a plurality of information memory elements for storing n-value information data and a plurality of check memory elements for storing check data, converting section for respectively converting the information data and the check data stored in the memory elements into binary codes having a plurality of bits each constituted by 0 or 1, the binary codes corresponding to the information data and the check data, and detecting/correcting section for detecting and correcting an error on the basis of the binary codes corresponding to the check data and the information data.

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IEEE Journal of Solid-State Circuits, "An Experimental Large-Capacity Semiconductor File Memory Using 16-Levels/Cell Storage." by Masashi Horiguchi, et al., vol. 23, No. 1, Feb. 1988, pp. 27-32.

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