Static information storage and retrieval – Read/write circuit
Patent
1998-07-28
2000-02-08
Phan, Trong
Static information storage and retrieval
Read/write circuit
36523003, 36518904, G11C 1604
Patent
active
060234288
ABSTRACT:
An integrated circuit device having a memory array (50) with segmented bit lines and a method of operation are disclosed. A sub array (52) of the memory array (50) can be operated as a multiple port sub array. A bit line of the sub array (52) is separated into bit line segments by disconnecting the bit line segments (54) from one another. A first bank of sense amplifiers (58) is connected to a first bit line segment (54) of the sub array (52), and a second bank of sense amplifiers (58) is connected to a second bit line segment (54) of the sub array (52). A first operation is performed to the first bit line segment (54) using the first bank of sense amplifiers (58), and a second operation is concurrently performed to the second bit line segment (54) using the second bank of sense amplifiers (58).
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Donaldson Richard L.
Holland Robby T.
Le Thong
Phan Trong
Texas Instruments Incorporated
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