DRAM cell and method of fabricating the same

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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Details

257398, 257301, 257302, H01L 27108, H01L 2976, H01L 2994, H01L 31119

Patent

active

059947292

ABSTRACT:
A method of fabricating a DRAM cell and the DRAM cell include a substrate, and a bit line formed in a first direction on the substrate. A channel region is then formed on a portion of the bit line. The channel region has a lateral surface extending vertically from the bit line. A first insulating layer is formed over the substrate, excluding the channel region, and is formed on at least a portion of the lateral surface of the channel region. A gate electrode is formed on a portion of the first insulating layer, which is on the portion of the lateral surface of the channel region, and a word line, connected to the gate electrode, is formed in a second direction on the first insulating layer. A second insulating layer is then formed over a portion of the substrate. The second insulating layer has a contact hole which exposes the channel region. Next, a capacitor is formed on a portion of the second insulating layer and on the channel region via the contact hole.

REFERENCES:
patent: 4742018 (1988-05-01), Kimura et al.
patent: 5281837 (1994-01-01), Kohyama
patent: 5497017 (1996-03-01), Gonzales
patent: 5561308 (1996-10-01), Kamata et al.
patent: 5684316 (1997-11-01), Lee
patent: 5696395 (1997-12-01), Tseng
patent: 5828094 (1998-10-01), Lee

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