Semiconductor device with a dual type polycide layer comprising

Details Semiconductor device with a dual type polycide layer comprising Semiconductor device with a dual type polycide layer comprising

1992-06-18

1994-10-11

Jackson, Jerome

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257382, 257770, 257413, 257384, 437 97, H01L 2348, H01L 2946, H01L 2954

Patent

active

053550102

ABSTRACT:
A semiconductor device comprising a semiconductor substrate, an insulating film formed on the semiconductor substrate, and a polycide film including a polysilicon layer and a silicide layer formed on the insulating film. The polysilicon layer includes a p-type region having p-type impurities diffused therein and an n-type region having n-type impurities diffused therein. The p-type impurities are implanted into the silicide layer in order to have a substantially uniform concentration over the entire potion thereof, so that the p-type impurities in the p-type region of the polysilicon layer do not diffuse into the silicide film by a poet heat treatment.

REFERENCES:
patent: 4640844 (1987-02-01), Neppl et al.
patent: 4985746 (1991-01-01), Asahina
Anonymous, "Gallium-Doped Titanium Silicide for Low Contact Resistivity," IBM Technical Disclosure Bulletin, vol. 29, No. 11, Apr. 1987, pp. 4969-4970.
H. Hayashida et al. "Dopant Redistribution in Dual Gate W-Polycide CMOS and its Improvement by RTA", 1989 Symposium on VLSI Technology; IEEE Cat. No. 89, May 22-25, 1989, pp. 29-30.

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