Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Patent
1997-08-13
2000-11-07
Palys, Joseph E.
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
G06F 1520
Patent
active
061450995
ABSTRACT:
In a debugging system for use in realizing simultaneously complete observation of internal operation and reproduction of malfunction actually caused in a target system which includes an integrated circuit, such as a microprocessor, contents of a memory and an internal initial state of the target system are snooped and stored in a snoop unit and a trace memory, respectively, both of which are included in a probe unit attached to the target system. The internal operation and the reproduction are simulated by a software simulator model by the use of the contents and the internal initial state which are stored in the trace memory and which are sent from the probe unit.
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NEC Corporation
Omar Omar A.
Palys Joseph E.
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