Static information storage and retrieval – Read/write circuit – Serial read/write
Patent
1999-11-12
2000-11-07
Elms, Richard
Static information storage and retrieval
Read/write circuit
Serial read/write
365233, 365239, 36518907, G11C 700
Patent
active
061446041
ABSTRACT:
A read/write electronic memory bank 10, including a plurality of memory units 22-28 and 12-18 which receive a common clock signal having a repetitive clock cycle and have a common input port 20, 21 and a common output port 30, 31. The units function such that in each clock cycle an input word is written to the memory bank 10 from the input port 20, 21 and an output word is read from the memory bank 10 to the output port 30, 31. Each memory unit 22-28 and 12-18 includes a single-port random-access memory (RAM) device 22-28 and a first-in first-out (FIFO) buffer 12-18, such that when the output word is to be read from the same memory unit 22-28 and 12-18 to which the input word is to be written in a given clock cycle, one of the input and output words is passed between the respective port 20, 21, 30, 31 of the memory bank 10 and the FIFO buffer 12-18, instead of between the respective port 20, 21, 30, 31 of the memory bank 10 and the RAM device 22-28.
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"Understanding Specialty Memories: Dual-Port RAMs", author unknown, cited on internet web address: http://www.cypress.com/design/techarticles/v2n2p5.html, on Nov. 9, 1999.
Haller Haggai Haim
Ulmer Elisha John
Brown Charles D.
Elms Richard
Greenhaus Bruce W.
Nguyen Tuan T.
Wadsworth Philip R.
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