Process for fabricating a metallized interconnect

Details Process for fabricating a metallized interconnect Process for fabricating a metallized interconnect

1996-07-19

1998-07-21

Everhart, Caridad

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438666, 438625, 438700, 438644, 438633, H01L 2144

Patent

active

057834857

ABSTRACT:
A process for fabrication of a metallized interconnect structure includes the formation of an inlaid interconnect (42) overlying an aluminum layer (34). The inlaid interconnect (42) is formed within an interlevel dielectric layer that is processed to contain an interconnect channel (24) and a via opening (14) residing at the bottom of the interconnect channel (24). The aluminum layer (34) is selectively deposited to at least partially fill the via opening (14) at the bottom of an interconnect channel (24). An adhesion layer (36) is deposited to overlie the aluminum layer (34) within the via opening (14), and a second aluminum layer (38) is blanket deposited and planarized to form the inlaid interconnect (42) in the interconnect channel (24).

REFERENCES:
patent: 4582563 (1986-04-01), Hazuki et al.
patent: 4710398 (1987-12-01), Homma et al.
patent: 5227191 (1993-07-01), Nagashima et al.
patent: 5305519 (1994-04-01), Yamamoto et al.
patent: 5328873 (1994-07-01), Mikoshiba et al.
patent: 5403779 (1995-04-01), Joshi et al.
patent: 5578523 (1996-11-01), Fiordalice et al.
patent: 5612254 (1997-03-01), Mu et al.
Amazawa et al., "A 0.25.mu. m Via Plug Process Using Selective CVD Aluminum for Multilevel Interconnection," IEEE 1991, 10.1.1-10.1.4., pp. 265-268.
Tsubouchi et al., "Selective AL CVD on Hydrogen-Terminated Si Surface," IEEE 1991, 10.2.1-10.2.4, pp. 269-272.
Matsumiya et al., "Chemical-Vapor Deposition Technques of Al for Direct Growth on Oxidized Si and High-Speed Growth," Jpn. J. Appl. Phys. vol. 24, 1995, pp. L17-l19.
Wilson et al., "A Comparison of A Two Layer Metal System Built with Selective CVD W Plugs and Elevated Temperature, Sputtered Al(Cu)," IEEE 1989, p. 493.
Zhu et al., "Selective Aluminum CVD for Sub-Micron Via Plug Filling," Mat. Res. Soc. Symp. Proc. vol. 260, 1992, pp. 125-130.

Affiliated with

Also associated with

Rating

Process for fabricating a metallized interconnect does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Process for fabricating a metallized interconnect, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Process for fabricating a metallized interconnect will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1646608