Low switching noise logic circuit

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Output switching noise reduction

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326 26, H03K 1716

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active

061442178

ABSTRACT:
An analog-digital hybrid IC device for reducing cross-talk adds an electrostatic capacitance element to the power supply side and/or the ground side of a CMOS logic circuit forming the digital circuit part, connects a resistance between the electrostatic capacitance element and the terminal to which the electrostatic capacitance element was added, and buffers charging and discharging when the logic elements switch on and off to reduce noise produced by current peaks.

REFERENCES:
patent: 4754170 (1988-06-01), Toda et al.
patent: 4783603 (1988-11-01), Goforth et al.
patent: 5021685 (1991-06-01), Kihara
patent: 5198699 (1993-03-01), Hashimoto et al.
"Determination of Optimum On-Chip Bypass Capacitor in CMOS VLSI Systems to Reduce Switching Noise", by Kanigicherla, et al., Proceedings of the 1997 IEEE International Symposium on Circuits and Systems: Circuits and Systems in the Information Age, vol. 3, Jun. 9, 1997, pp. 1724-1727.
"Analog Logic Techniques Steer Around the Noise", by Allstot, et al., IEEE Circuits and Devices Magazine, vol. 9, No. 5, Sep. 1, 1993, pp. 18-21.
"Analog Logic Techniques Steer Around the Noise", by Allstot et al., IEEE Circuits & Devices, vol. 9, No. 9, Sep. 1993, pp. 18-21.

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