Protection of the logic well of a component including an integra

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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Details

257329, 257133, 257134, 257135, 257267, H01L 2976, H01L 2994, H01L 31062, H01L 31113, H01L 31119

Patent

active

061440663

ABSTRACT:
The present invention relates to a structure for ground connection on a component including a vertical MOS power transistor and logic components, the substrate of a first type of conductivity of the component corresponding to the drain of the MOS transistor and the logic components being formed in at least one well of the second type of conductivity and on the upper surface side of the substrate. In the logic well, a region of the first type of conductivity is formed, on which is formed a metallization, to implement, on the one hand, an ohmic contact, and on the other hand, a rectifying contact.

REFERENCES:
patent: 4767722 (1988-08-01), Blanchard
patent: 5077586 (1991-12-01), Quessada
patent: 5099302 (1992-03-01), Pavlin
patent: 5294814 (1994-03-01), Das
patent: 5665988 (1997-09-01), Huang
patent: 5760440 (1998-06-01), Kitamura et al.
patent: 5780895 (1998-07-01), Barret et al.
French Search Report from French Patent Application No. 97 07741, filed Jun. 17, 1997.

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