Semiconductor device manufacturing: process – Chemical etching – Combined with the removal of material by nonchemical means
Patent
1997-09-12
2000-11-07
Powell, William
Semiconductor device manufacturing: process
Chemical etching
Combined with the removal of material by nonchemical means
438697, 438723, 438738, 438743, 216 38, H01L 2100
Patent
active
06143664&
ABSTRACT:
A method of planarizing a structure having an interpoly layer is disclosed. The method includes forming an undoped silica glass layer on at least a polysilicon region formed on a semiconductor substrate. Next, a spin-on-glass layer is formed over the undoped silica glass layer. Finally, the spin-on-glass layer is etched back, thereby planarizing the structure having the interpoly layer.
REFERENCES:
patent: 5702980 (1997-12-01), Yu et al.
patent: 5858860 (1999-01-01), Shim et al.
patent: 5858870 (1999-01-01), Zheng et al.
Chen Yue-Feng
Lee Chung-Ju
Lin Wei-Ray
Tu Yeur-Luen
Yao Liang-Gi
Powell William
Vanguard International Semiconductor Corporation
LandOfFree
Method of planarizing a structure having an interpoly layer does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of planarizing a structure having an interpoly layer, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of planarizing a structure having an interpoly layer will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1640671