Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1989-10-16

1991-04-23

Popek, Joseph A.

Static information storage and retrieval

Systems using particular element

Ferroelectric

365210, 365149, G11C 1134

Patent

active

050105183

ABSTRACT:
A semiconductor memory device comprises a first bit line, a second bit line paired with the first bit line, a third bit line branch-connected with the first bit line, a fourth bit line paired with the third bit line and branch-connected with the second bit line, a memory cell array connected to the bit lines, a first reference cell, and a second reference cell. The first reference cell is connected to the first bit line and the third bit line, constituted by a cell which is formed of substantially the same area, capacity and structure as the memory cell array, and providing a reference potential at the time of reading out data from memory cells in the memory cell array. And the second reference cell is connected to the second bit line and the fourth bit line, constituted by a cell which is formed of substantially the same area, capacity and structure as the memory cell array, and providing a reference potential at the time of reading out data from the memory cells in the memory cell array. The memory cell array is a non-volatile type constituted by ferroelectric cells.

REFERENCES:
patent: 4873664 (1989-10-01), Eaton, Jr.
"A New Memory Technology Is About to Hit The Market", Electronics, pp. 91-95, Feb. 18, 1988.
Evans, et al., "An Experimental 512-bit Nonvolatile Memory with Ferroelectric Storage Cell", IEEE Journal of Solid-State Circuits, vol. 23, No. 5, pp. 1171-1175, Oct. 1988.

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