Electronic digital logic circuitry – Interface – Supply voltage level shifting
Patent
1996-03-13
1998-09-22
Santamauro, Jon
Electronic digital logic circuitry
Interface
Supply voltage level shifting
326 27, 326 83, H03K 190185
Patent
active
058119906
ABSTRACT:
A voltage pump and method of driving a node to an increased potential. A periodic input signal is fed into a precharged small capacitor to create a level shifted periodic intermediate potential at an intermediate node. The intermediate node is a supply node to a level translator circuit. The output of the level translator circuit controls the actuation of a pass transistor. When actuated the pass transistor drives a boosted potential to an output node of the voltage pump circuit. In one embodiment the level translator circuit has a delay element which maintains the deactivation of a pull down portion of the level translator circuit until a pull up portion of the level translator circuit is deactivated. A first diode clamp is used to limit the output of the level translator circuit and the boosted potential to within 1 threshold voltage (of the diode clamp) of each other. A second diode clamp is connected between the terminals of the pass transistor so that the boosted potential does not need to climb above the output potential plus a Vt of the second diode clamp. This in turn limits the gate potential of the transistor through the first diode clamp. In a further embodiment a precharge circuit precharges the first terminal of the transistor to a potential equal to the intermediate potential minus a threshold voltage of the precharge circuit.
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Blodgett Greg A.
Merritt Todd A.
Micro)n Technology, Inc.
Santamauro Jon
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