Semiconductor device and manufacturing process thereof

Details Semiconductor device and manufacturing process thereof Semiconductor device and manufacturing process thereof

1996-04-12

1998-09-22

Thomas, Tom

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257532, 257908, H01L 27108, H01L 2900

Patent

active

058118497

ABSTRACT:
A silicon oxide film is formed on a wire array by CVD employing a gas mixture composed of a gas containing silicon atoms and hydrogen peroxide, and the thickness of the silicon oxide film in the region apart from the wire array is formed to be at least 50% of the wire thickness. Planarization of the silicon oxide film over the wire array region is attained.

REFERENCES:
patent: 5212114 (1993-05-01), Grewal et al.
patent: 5364811 (1994-11-01), Ajika et al.
patent: 5406103 (1995-04-01), Ogawa
patent: 5489791 (1996-02-01), Arima
patent: 5519237 (1996-05-01), Itoh
patent: 5532956 (1996-07-01), Watanabe
patent: 5608248 (1997-03-01), Ohno
Technical Digest of IEDM '94, "Novel Self-planarizing CVD Oxide for Interlayer Dielectric Applications" M.Matsuura, et al, (4 pages).
Proceedings of DUMIC '95, "Planarization for Sub-micron Device utilising a New Chemistry" A. Kiemasz, et al pp. 94-100.

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