Memory system with multiplexed input-output port and systems and

Details Memory system with multiplexed input-output port and systems and Memory system with multiplexed input-output port and systems and

1996-04-24

1998-10-27

Swann, Tod R.

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

36523002, 36518902, 364DIG1, G06F 1200

Patent

active

058290168

ABSTRACT:
A memory including a plurality of input/output terminals 220 for exchanging data bits during a data access cycle and receiving command and control bits during a command and control cycle. The memory further includes an array of memory cells 201, a data input/output circuitry for transferring data between the input/output terminals and the array of memory cells during the data access cycle, and control circuitry for controlling operations of the memory in response to command and control bits received at the input/output terminals during the command and control cycle.

REFERENCES:
patent: 5313624 (1994-05-01), Harriman et al.
patent: 5319755 (1994-06-01), Farmwald et al.
patent: 5408129 (1995-04-01), Farmwald et al.
patent: 5430676 (1995-07-01), Ware et al.
patent: 5434817 (1995-07-01), Ware et al.
patent: 5537353 (1996-07-01), Rao et al.
patent: 5539696 (1996-07-01), Patel
patent: 5570320 (1996-10-01), Runas
patent: 5581513 (1996-12-01), Rao

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