Processor for digitized video having common bus for real time tr

Details Processor for digitized video having common bus for real time tr Processor for digitized video having common bus for real time tr

1987-07-30

1990-02-20

Williams, Jr., Archie E.

Boots, shoes, and leggings

3649272, 364521, G06F 1566, G06F 314, G06F 1316, G06F 1340

Patent

active

049032275

ABSTRACT:
A pair of bus controllers are connected to a common bus and operated by high speed video digitizing timing signals for passing, in real time, the digitized data from incoming digitizing circuitry to output circuitry which converts the digitized data into video signals. A memory is connected by another bus to a computer, and a bus interface or selective dual ports of the memory selectively connect the memory to the common digital data bus so that digitized signals are written to and read from the memory in real time in accordance with the high speed timing signals and corresponding address signals.

REFERENCES:
patent: 3875391 (1975-04-01), Shapiro et al.
patent: 4409669 (1983-10-01), Neumann et al.
patent: 4485402 (1984-11-01), Searby
patent: 4538179 (1985-08-01), Tsutomu et al.
patent: 4628467 (1986-12-01), Nishi et al.
patent: 4635292 (1987-01-01), Mori et al.
patent: 4652921 (1987-03-01), Rae-Smith
patent: 4701865 (1987-10-01), Goodman

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