Reference voltage generating circuit for ferroelectric memory de

Details Reference voltage generating circuit for ferroelectric memory de Reference voltage generating circuit for ferroelectric memory de

1998-06-26

2000-05-02

Kim, Jung Ho

Static information storage and retrieval

Read/write circuit

Including reference or bias voltage generator

365145, G11C 1134

Patent

active

060580496

ABSTRACT:
The present invention provides a reference voltage generating circuit for generating a stable reference voltage and having a long life time, and the reference voltage generating circuit for generating a reference voltage of a ferroelectric memory device having a plurality of bit line pairs, including: a first and second reference word line; a first dummy block comprising a plurality of switching transistors and a plurality of ferroelectric capacitors, wherein gates of the switching transistors are coupled to the first reference word line and drains/sources of the switching transistors are coupled to a bit line of one of the bit line pairs; a second dummy block comprising a plurality of switching transistors and a plurality of ferroelectric capacitors, wherein gates of the switching transistors are coupled to a second reference word line and drains/sources of the switching transistors are coupled to a bit bar line of one of the bit line pairs; and a reference plate line commonly coupled to the ferroelectric capacitors of both of the dummy blocks.

REFERENCES:
patent: 5663904 (1997-09-01), Arase
patent: 5764561 (1998-06-01), Nishimura
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patent: 5850157 (1998-12-01), Zhu et al.
patent: 5856918 (1999-01-01), Soneda et al.
patent: 5877650 (1999-03-01), Matsushita
patent: 5898335 (1999-04-01), Mayamoto
patent: 5907484 (1999-05-01), Kowshik
patent: 5999439 (1999-12-01), Seyyedy

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