Semiconductor memory device having a function of simultaneously

Details Semiconductor memory device having a function of simultaneously Semiconductor memory device having a function of simultaneously

1988-11-22

1990-09-18

Hecker, Stuart N.

Static information storage and retrieval

Read/write circuit

Erase

36523003, G11C 700

Patent

active

049583263

ABSTRACT:
A semiconductor memory device includes a first memory cell array and a second memory cell array section into which the same data can be simultaneously written. Logic gates are provided between the word lines of the first memory cell array section and the respective word lines of the second memory cell array section. In the normal operation mode, the logic gates connect each of the rows of memory cells in the first memory cell array section to a corresponding one of the rows of memory cells in the second memory cell array section, and set each of the rows of memory cells in the second memory cell array section to a selected level when the same data is simultaneously written into the memory cells of the second memory cell array section. When each of the rows of memory cells in the second memory cell array section is set to the selected level, all the columns of the memory cells in the second memory cell array section are simultaneously selected and the same data is simultaneously written into the second memory cell array section.

REFERENCES:
patent: 4789967 (1988-12-01), Liou et al.
patent: 4879686 (1989-11-01), Suzuki et al.
patent: 4890263 (1989-12-01), Little

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