Semiconductor memory device having stacked capacitor

Details Semiconductor memory device having stacked capacitor Semiconductor memory device having stacked capacitor

1995-07-06

1997-11-18

Meier, Stephen

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257310, H01L 27108, H01L 2976, H01L 2994, H01L 31119

Patent

active

056891261

ABSTRACT:
In a stacked capacitor for a DRAM cell, including a lower electrode layer, an upper electrode layer and an insulating layer therebetween, at least two insulating layers are formed on the upper electrode layer, and a wiring layer is formed on the two insulating layers. The upper electrode layer is connected via a contact hole perforated in the two insulating layers to the wiring layer.

REFERENCES:
patent: 5361234 (1994-11-01), Iwasa
patent: 5432732 (1995-07-01), Ohmi
T. Kikkawa, "Quarter-Micron Interconnection Technology for 256M DRAMs", International Conference on Solid State Devices and Materials, pp. 90-92, 1992 no month.

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