Multi-layer substrate structure

Details Multi-layer substrate structure Multi-layer substrate structure

1996-09-19

1997-11-18

Sough, Hyung S.

Electricity: conductors and insulators

Conduits, cables or conductors

Preformed panel circuit arrangement

174260, 174266, 361761, 361764, 361809, 257698, 257700, 29846, 29852, H05K 118, H05K 332

Patent

active

056890915

ABSTRACT:
A multi-layer substrate structure and a method for fabricating the same are provided. Thin metal foils are laminated on the top and bottom sides of a non-conductive layer so as to form a laminated substrate. A plurality of plated-through holes are formed in the laminated substrate and are then filled with an epoxy. The laminated substrate is then patterned and etched. Epoxy layers are disposed on both sides of the laminated substrate. The laminated substrate is formed with a plurality of smaller plated-through holes extending through the epoxy layers and with a cavity to receive an integrated-circuit die. The through holes and the epoxy layers are metallized on both sides of the laminated substrate. The laminated substrate is patterned and etched again. A solder mask is applied on both sides of the laminated substrate so as to form selective wire bondable areas and selective solderable areas. The integrated circuit die is disposed in the center of the cavity and has a plurality of bonding pads. A plurality of bonding wires are connected between corresponding selective wire bondable areas on the laminated substrate and associated bonding pads on the die. The integrated circuit die and plurality of bonding wires are encapsulated with a plastic molding material. Finally, a plurality of solder balls are attached to the selective solderable areas.

REFERENCES:
patent: 4170819 (1979-10-01), Peter et al.
patent: 4211603 (1980-07-01), Reed
patent: 5319159 (1994-06-01), Watanabe et al.
patent: 5487218 (1996-01-01), Bhatt et al.
patent: 5557503 (1996-09-01), Banerjee et al.

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