Static RAM

Static information storage and retrieval – Read/write circuit – Bad bit

Patent

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Details

3652257, 36523006, G11C 700

Patent

active

052745945

ABSTRACT:
A static RAM comprises: column select circuits for connecting a plurality of pairs of corresponding complementary data lines at a unit of each pair with common complementary data lines; and redundant circuits each composed of the complementary data line pair and the column select circuit corresponding to the unit. Load MOSFETs of the complementary data lines are arranged close to the column select circuits to inhibit the column selecting operations by a decoder circuit and turn off the load MOSFETs when fuse means is cut. An access to a defective address is detected by a redundant decoder stored with the defective address, when the fuse means is selectively cut, to select the column select circuits of the redundant circuit.

REFERENCES:
patent: 4587639 (1986-05-01), Aoyama et al.
patent: 4603404 (1986-07-01), Yamauchi et al.
patent: 4935899 (1990-06-01), Morigami
patent: 4975881 (1990-12-01), Kagami
patent: 5060197 (1991-10-01), Park et al.

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