Method of making asymmetrical field effect transistor

Fishing – trapping – and vermin destroying

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437 39, 437175, 437913, 437912, 437983, 437984, 357 232, 357 239, 357 22, H01L 21265, H01L 2144, H01L 2922, H01L 2978

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050360175

ABSTRACT:
A method of making a field effect transistor includes forming an active layer in a semiconductor substrate, forming a gate material on a portion of the surface as an ion implantation mask, implanting dopant ions to form a source region, depositing a first mask over the source region and a portion of the gate material, and removing the unmasked gate material to define a gate electrode. A second mask is deposited adjacent the gate electrode opposite the source region, and dopant impurities are implanted to form a drain region using the mask. The source and drain regions are asymmetrically doped and the gate electrode is asymmetrically disposed relative to the source and drain regions in the self-aligning process.

REFERENCES:
patent: 4532698 (1985-08-01), Fang et al.
patent: 4645563 (1987-02-01), Terada
patent: 4700455 (1987-10-01), Shimada et al.
patent: 4701422 (1987-10-01), Elliott
patent: 4769339 (1988-09-01), Ishii
patent: 4839304 (1989-06-01), Morikawa
patent: 4902646 (1990-02-01), Kakano
"Asymmetric Implantation Self-Alignment Technique for GaAs MESFETs", Kimura et al, Jap. J. Appl. Phys., vol. 27, #7, Jul. 1988, pp. L1340-L1343.

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