Static semiconductor memory device having capacitors for increas

Details Static semiconductor memory device having capacitors for increas Static semiconductor memory device having capacitors for increas

1994-02-14

1995-04-11

Limanek, Robert P.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257904, 365156, H01L 2978, G11C 700

Patent

active

054061075

ABSTRACT:
In a memory cell having a pair of driving transistors each formed of a bulk type N channel MOS transistor and a pair of load transistors each formed of a P channel thin film transistor, a capacitor is connected between a gate electrode and a drain of each of the thin film transistors. With this arrangement, it is to ameliorate immunity from a soft error caused by an external disturbance such as a-rays.

REFERENCES:
patent: 4805147 (1989-02-01), Yamanaka et al.
patent: 5134581 (1992-07-01), Ishibashi et al.
patent: 5298764 (1994-03-01), Yamanaka et al.
K. Ueda et al., "Improvement of Soft Error Immunity in a Polysilicon PMOS Load Memory Cell", Proc. IEICE Fall Conf. '91, C-427, p. 5-141.

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