Semiconductor memory

Static information storage and retrieval – Read/write circuit – Signals

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Details

3652335, 365205, 365154, 36518909, G11C 700

Patent

active

058354239

ABSTRACT:
A semiconductor device comprises: a memory cell array which has a plurality of memory cell to output data from a memory cell selected on the basis of an externally input signal; a sense amplifier for receiving the data output from said memory cell array, amplifying the data, and outputting the data; and a pulse generator for receiving the input signal and outputting a pulse for determining a timing at which said sense amplifier is activated, wherein said pulse generator includes a circuit pattern electrically equivalent to elements included in said memory cell. According to the above device, the pulse generator includes the same pattern as that of elements included in the memory cell. When the operation speed of the memory cell varies due to the manufacturing process, etc, the variation can be canceled by a similar variation, so that an erroneous operation of the sense amplifier is prevented and the operation speed can be increased.

REFERENCES:
patent: 4947379 (1990-08-01), Okuyama
patent: 5245584 (1993-09-01), Zampaglione et al.
patent: 5424985 (1995-06-01), McClure et al.
patent: 5566130 (1996-10-01), Durham et al.
patent: 5642319 (1997-06-01), Nagashima

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