Flexible fuse placement in redundant semiconductor memory

Details Flexible fuse placement in redundant semiconductor memory Flexible fuse placement in redundant semiconductor memory

1997-03-28

1999-01-12

Yoo, Do Hyun

Static information storage and retrieval

Read/write circuit

Bad bit

365222, 3652257, 36523003, 36523008, 365233, 365240, G11C 700, G11C 800

Patent

active

058598014

ABSTRACT:
Disclosed is a semiconductor memory having a main memory cell array and redundant memory cells, with a plurality of fuses that can be physically separated from their associated fuse latches. Physical separation is possible by incorporating serial transfer circuitry to serially transfer fuse data from the fuses towards the latches. As a result, only a small number of wires are needed to connect the fuses to the fuse latches, allowing for flexible fuse placement within the memory.

REFERENCES:
patent: 4719601 (1988-01-01), Gray et al.
patent: 5206831 (1993-04-01), Wakamatsu
patent: 5359559 (1994-10-01), Nomura et al.
patent: 5383156 (1995-01-01), Komatsu
patent: 5402390 (1995-03-01), Ho et al.
patent: 5448528 (1995-09-01), Nagai
patent: 5451812 (1995-09-01), Gomi
patent: 5506804 (1996-04-01), Yanagisawa et al.
patent: 5532966 (1996-07-01), Poteet et al.
patent: 5569955 (1996-10-01), Chillara et al.
patent: 5585665 (1996-12-01), Anjoh et al.

Affiliated with

Also associated with

Rating

Flexible fuse placement in redundant semiconductor memory does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Flexible fuse placement in redundant semiconductor memory, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Flexible fuse placement in redundant semiconductor memory will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1521883