Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Patent
1997-06-27
1999-09-14
Grant, William
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
371 376, 370 601, H03M 1300
Patent
active
059517077
ABSTRACT:
Described is a method and apparatus which calculates Cyclic Redundant Check (CRC) for an entity from partial CRCs associated with segments of the entity. The entity includes a data packet segmented into a plurality of Asynchronous Transfer Mode (ATM) cells. The Packet CRC is calculated from the algorithm (A.sub.1 C.sub.1 +A.sub.2 C.sub.2 . . . +A.sub.N C.sub.N)/P with A.sub.i, i=1, . . . , N, representing a partial CRC associated with a particular ATM cell, C.sub.i, i-1, . . . , N, representing a Fixed Remainder and P is the CRC generation polynomial. The C.sub.i values are calculated and stored in a table. The partial CRCs (i.e., A.sub.i 's) are calculated by hardware generator and forwarded to a processor which selects the corresponding value of C.sub.i from the table and generates the CRC for the frame.
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Christensen Kenneth Jussi
Polge Steven Eric
Roginsky Allen Leonid
Cockburn Joscelyn G.
Grant William
International Business Machines - Corporation
Marc McDieunel
LandOfFree
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