Method and apparatus for supporting power conservation operation

Electrical computers and digital processing systems: support – Computer power control

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Details

713310, 713320, 713322, 713323, 713330, 713500, 713600, 710266, 365222, 365227, G06F 126, G06F 128

Patent

active

060853255

ABSTRACT:
An apparatus for managing power in an electronic device that receives the power from a bus is described. The apparatus comprises a clock enable circuit that disables a clock that generates nominal clock frequencies derived from raw frequencies output by an oscillator upon receiving a first signal. A time-wise independent time reference circuit is coupled to the clock enable circuit. The time-wise independent time reference circuit sends the first signal to the clock enable circuit a first predetermined period of time after receiving a signal to enter into a suspend state.

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