Semiconductor device and method of making

Details Semiconductor device and method of making Semiconductor device and method of making

1998-12-21

2000-07-04

Monin, Jr., Donald L.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257349, 257404, 438207, 438217, 438289, H01L 29167, H01L 29207

Patent

active

060842695

ABSTRACT:
A graded-channel semiconductor device (10) is formed in a pedestal (12). The pedestal (12) is formed on a substrate (11) and improves the electrical characteristics of the device (10) compared to conventional device structures. The pedestal (12) has sides (13) that are bordered by a dielectric layer (24) to provide electrical isolation. The semiconductor device (10) includes a drain extension region (101) that extend from a drain region (44) to a gate structure (20). The semiconductor device (10) also has a conductive structure (105) that is adjacent to the gate structure (20).

REFERENCES:
patent: 4198252 (1980-04-01), Hsu
patent: 4371955 (1983-02-01), Sasaki
patent: 4545109 (1985-10-01), Reichert
patent: 4697198 (1987-09-01), Komori et al.
patent: 4796070 (1989-01-01), Black
patent: 5021845 (1991-06-01), Hashimoto
patent: 5384476 (1995-01-01), Nishizawa
patent: 5395773 (1995-03-01), Ravindhran et al.
patent: 5434093 (1995-07-01), Chau et al.
patent: 5512770 (1996-04-01), Hong
patent: 5548154 (1996-08-01), Miller
patent: 5559357 (1996-09-01), Krivokapic
patent: 5583361 (1996-12-01), Morishita
patent: 5600168 (1997-02-01), Lee
patent: 5656842 (1997-08-01), Iwamatsu et al.
patent: 5895954 (1999-04-01), Yasumura et al.
H. Lin et al., "Computer Analysis of the Double-Diffused MOS Transistor for Integrated Circuits," Transactions on Electron Devices, vol. Ed-20, No. 3, Mar. 1973, pp. 275-282.
S. Shimizu et al., "0.15.mu.m CMOS Process for High Performance and High Reliability,"IEEE 1994, San Francisco, CA, pp. 67-70.
K. Lee et al., "Room Temperature 0.1 .mu.m CMOS Technology with 11.8 ps Gate Delay," IEEE 1993, Washington, DC, pp. 131-134.

Affiliated with

Also associated with

Rating

Semiconductor device and method of making does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor device and method of making, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device and method of making will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1488841