DRAM cell with a fork-shaped capacitor

Details DRAM cell with a fork-shaped capacitor DRAM cell with a fork-shaped capacitor

1999-01-18

2000-07-04

Hardy, David

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257308, H07L 27108

Patent

active

06084261&

ABSTRACT:
A fork-shaped capacitor of a dynamic random access memory cell is disclosed. This capacitor includes a semiconductor layer (110), and a first dielectric layer (119) formed over the semiconductor layer. The capacitor also includes a first conductive region (118) formed on a portion of the first dielectric layer, the first conductive region communicating to the semiconductor layer via a hole in the first dielectric layer. At least two second conductive regions (122) are formed on the first conductive region, each of the conductive regions being spaced from each other. Further, at least two third conductive regions (126) are formed on the first dielectric layer, each of the third conductive regions being spaced from each other, each of the third conductive regions being spaced from each of the second conductive regions, wherein a portion of each of the third conductive regions abuts a sidewall of the first conductive region. Finally, the capacitor includes a second dielectric film (136) formed on surface of the first conductive region, the second conductive regions, and the third conductive regions; and a conductive layer (138) formed on the second dielectric film.

REFERENCES:
patent: 5453633 (1995-09-01), Yun
patent: 5744833 (1998-04-01), Chao
patent: 5869861 (1999-02-01), Chen

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