Memory system with selective assignment of spare locations

Excavating

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Details

364200, 364900, 365200, G06F 1120, G11C 2900

Patent

active

044505590

ABSTRACT:
A memory system is provided with a simple flexible control arrangement for assigning locations in an alternate memory as replacements for previously identified defective fault areas in main memory. The assignment of the replacement locations in the alternate memory is made on a selective basis taking into consideration the defect status of other failure independent bit positions of a data word and the power of the ECC code which is used in connection with the memory system. A relatively small writable index, which is addressed by a subset of the main memory address signals, provides a partial address and control fields to the alternate memory in accordance with control data transferred from the host system. Control data is developed by the host system each time it is powered on and is based on identifying each defective location in main memory through a diagnostic routine and analyzing the defect distribution in a way to provide control signals which minimize the number of replacements that are assigned and maximize the number of data words that can be transferred from the memory system to the host system before an uncorrectable error is encountered by the ECC system.

REFERENCES:
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patent: 4051460 (1977-09-01), Yamada et al.
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patent: 4375664 (1983-03-01), Kim
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Bossen, D. C. et al., "Measurement and Generation of Error Correcting Codes for Package Failure", IEEE Transactions on Computers, vol. C-27, No. 3, Mar. 1978, pp. 201-204.

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