ROM mapping and inversion apparatus and method

Details ROM mapping and inversion apparatus and method ROM mapping and inversion apparatus and method

1994-12-27

1998-06-02

Chan, Eddie P.

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

711 1, 711 2, 711 5, 711101, 711103, G06F 1202

Patent

active

057617007

ABSTRACT:
Read Only Memory (ROM) (10) data may be selectively inverted to decrease energy dissipation. Within the ROM (10), a plurality of memory cells (16) are connected to bit-line (18) and word-line (20) and store data, which determines the loading for a particular line. Line loading may be manipulated by accessing initial mapping information (23) of the ROM (10) and calculating the line loading on each line (18 or 20) and whenever a line's load exceeds a threshold, data stored in the memory cells (16) on the particular line (18 or 20) are inverted. Having done this, new mapping information (23) is produced and used to retrieve data from the ROM (10).

REFERENCES:
patent: 4240151 (1980-12-01), Kawagoe
patent: 4661927 (1987-04-01), Graebel
patent: 4805143 (1989-02-01), Matsumoto et al.
patent: 5226014 (1993-07-01), McManus

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