Dynamic window mechanism for preventing invalid information prop

Details Dynamic window mechanism for preventing invalid information prop Dynamic window mechanism for preventing invalid information prop

1997-05-12

1999-11-09

Sheikh, Ayaz R.

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus access regulation

710100, 710107, 710113, 710129, G06F 1314

Patent

active

059833009

ABSTRACT:
A method and apparatus to prevent invalid data from propagating into devices connected to a PCI tristate bus is provided. The method and apparatus utilize the PCI bus control signals to monitor the bus transaction's mode (e.g., as a bus target or as a bus master), type (e.g., read, write), and status (e.g., ongoing bus transaction). Using these information, control the opening and closing of a window gate hardware to allow valid data to propagate into a device connected to the PCI tristate bus and to prevent invalid data from propagating into the device.

REFERENCES:
patent: 5581713 (1996-12-01), Myers et al.
patent: 5649175 (1997-07-01), Kanekal et al.
patent: 5802324 (1998-09-01), Wunderlich et al.

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