Short channel MOSFET with buried anti-punch through region

Details Short channel MOSFET with buried anti-punch through region Short channel MOSFET with buried anti-punch through region

1987-06-09

1995-01-24

Larkins, William D.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257297, 257407, H01L 27108

Patent

active

053844769

ABSTRACT:
A semiconductor device having a source region, a drain region and a channel region which are formed in a surface portion of a semiconductor substrate, and a gate formed with a material having a relatively high built-in voltage relative to the source region. This semiconductor device may further include, in the semiconductor substrate to extend along the channel region, a highly-doped region having a conductivity type opposite to that of the source region. This highly-closed region may have an impurity concentration gradient which is greater toward its portion facing the abovesaid surface of the substrate. These arrangements serve to prevent extinction of memory due to current leakage during absence of bias voltage which otherwise would develop in semiconductor devices having short-channel and thin gate oxide layer, and due to irradiation of alpha-particle onto the device.

REFERENCES:
patent: 3673471 (1972-06-01), Klein et al.
patent: 4247862 (1981-01-01), Klein et al.
patent: 4329706 (1982-05-01), Crowder et al.
patent: 4334235 (1982-06-01), Nishizawa
Konaka et al, "Suppression of Anomalous Drain Current . . . ", Japan. J. Appl. Physics, Suppl. 18-1, 1979, pp. 27-33.
Nishiuchi et al, IEEE International Electron Dev. Meeting, Dec. 1978, Technical Digest pp. 26-29.
Dennard, et al, IEEE J. of Solid State Circuits, vol. SC 9 No. 5, Oct. 1974, pp. 256-267.
Tasch, Jr., et al, IEEE Trans. on Electron Dev. vol. ED 25 No. 1, Jan. 1978, pp. 33-41 (not including p. 39).

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