Semiconductor memory and method of fabricating the same

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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Details

257208, 257390, 257401, 257508, 257513, 257296, 257306, H01L 29105, H01L 2994, H01L 31062, H01L 31113

Patent

active

057604525

ABSTRACT:
Disclosed are an improved semiconductor memory cell suitable for high integration and a novel method of fabricating the same. The memory cell has a large capacitance and a small area. The memory cell also has a plurality of bit-lines buried in an isolation region in a semiconductor substrate. The bit-line has a very small width and thickness thereby reducing a parasitic capacity between the bit-line and the semiconductor substrate. The memory cell may further be provided with a noise shielding line. Further, disclosed is a novel memory cell array of a semiconductor memory. The buried bit-line is coupled with a bit-line connecting sub-arrays and both are separated by a insulation film. A plurality of pairs of the bit-lines are arranged in rows. A word-line is coupled with a sub-word line and both are separated by a insulation film. A plurality of pairs of the word-lines are arranged in columns. The memory cells are arranged at the intersections of the buried bit-lines and the word-lines. The memory cells are also alternatively arranged on the adjacent buried bit-lines so that the number of the memory cells arranged on one of the buried bit-lines are reduced.

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