Teg for carrier lifetime evaluation

Details Teg for carrier lifetime evaluation Teg for carrier lifetime evaluation

Filed on

1997-05-22

Date issued

1998-12-15

Examiner

Munson, Gene M.

Patent Class

Active solid-state devices (e.g., transistors, solid-state diode

SubClass

Test or calibration structure

Other Related Categories

257378, 324763, 324767, 324769, H01L 2348, H01L 2978, G01R 3126

Type

Patent

Status

active

Patent number

058500880

Description

ABSTRACT:
This invention provides TEGs for improving accuracy of lifetime evaluation. The TEGs include a base region <Ba> selectively having a cathode region <C> in the surface portion thereof, and an anode region <A>. The intersection of a center line of the cathode region <C> and the anode region <A> provides a function region <WT> located within the range of 5h, five times as much as a height h of a wafer <W>. The function region <WT> makes a pair with the cathode region <C> and actually serves as an actual anode region for the cathode region <C>. As an area ratio of the cathode region <C> to the function region <WT> is smaller, ON voltage values Vf obtained for respective lifetime values get isolated from each other. Thus, the cathode region <C> is formed so that the area ratio of the cathode region <C> to the function region <WT> is about 1/1750000 to 1/4500.

REFERENCES:
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patent: 5285082 (1994-02-01), Axer
patent: 5532502 (1996-07-01), Seki
patent: 5608335 (1997-03-01), Tailliet
patent: 5701018 (1997-12-01), Hanaoka et al.
Ichiro Omura, et al., "An Accurate PC Aided Carrier Lifetime Determination Technique From Diode Reverse Recovery Waveform" Proceedings of 1995 International Symposium on Power Semiconductor Devices & ICs. Yokohama. pp. 422-426.
J. Linnros, et al., "Depth Resolved Carrier Lifetime Measurements of Proton Irradiated Thyristors" IEDM 91, pp. 157-160.

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