Method for forming interconnection in semiconductor device

Details Method for forming interconnection in semiconductor device Method for forming interconnection in semiconductor device

1996-12-11

1998-06-02

Quach, T. N.

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438626, 438637, 438648, H01L 21283, H01L 2132

Patent

active

057599149

ABSTRACT:
A method for forming an interconnection in semiconductor device is disclosed wherein there is first provided a semiconductor substrate where a first metal interconnection is formed thereon. A first insulating layer is formed on the semiconductor substrate, Thereafter, a plurality of second insulating layer patterns is formed on the first insulating layer. Afterwards, spaces between the plurality of the second insulating layer patterns are filled with a first metal. Thereafter, the second insulating layer patterns over respective patterns of the first metal interconnection and the overlying first insulating layer are etched to form a plurality of contact holes. The plurality of contact holes is filled with a second metal. Lastly, a second metal interconnection is formed.

REFERENCES:
patent: 5141896 (1992-08-01), Katoh
patent: 5169802 (1992-12-01), Yeh
Kaanta, C., et al., "Dual Damascene: A ULSI Wiring Technology", Jun. 11-12, 1991 VMIC Conf., pp. 144-152, Jun. 1991.

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