Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Patent
1997-02-03
1998-12-15
Niebling, John
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
438692, H01L 2184
Patent
active
058496122
ABSTRACT:
A thin film field effect transistor has a three-layer structure including a polycrystalline semiconductor layer to be a channel region, a conductive layer to be a gate electrode and a insulating layer to be a gate insulating film between the channel region and the gate electrode. The roughness of an interface between the channel region and the gate insulating film is less than a few nm so that the current drivability of the transistor is improved.
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Chan et al., "Polished TFT's: surface roughness reduction and its correlation to device performance improvement", IEEE Transactions on Electron Devices, vol. 44, No. 3, pp. 455-463, Mar. 1997.
Kojima Yoshikazu
Takahashi Hiroshi
Booth Richard A.
Niebling John
Seiko Instruments Inc.
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