Receiver having PLL frequency synthesizer with RC loop filter

Oscillators – Automatic frequency stabilization using a phase or frequency... – Particular error voltage control

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Details

331 25, 455260, 455316, H03L 7093, H04B 126

Patent

active

052219119

ABSTRACT:
A receiver having an RF section, a mixer stage and a signal processing stage, the mixer stage receiving a mixing frequency from a frequency synthesis circuit which includes a phase-locked loop provided with a phase detection device having a current output, a loop filter including a .pi.-shaped RC network having an input shunt path and an output shunt path which are connected to respective ends of a series resistor incorporated in a series path, and to ground, and include first and second capacitances, respectively, and with a voltage-controlled oscillator, a reference frequency being applied to the phase detection device. In order to prevent the use of active filter circuits in the phase-locked loop of such a receiver, the second capacitance is chosen to be at least twice as large as the first capacitance, the series resistance is chosen to be smaller than the output impedance of the phase detection device and the output shunt path of the loop filter is provided with an RC phase shift member for reducing the phase shift of the second capacitance in the output shunt path.

REFERENCES:
patent: 3316497 (1967-04-01), Brooks
patent: 3810046 (1974-05-01), Lance
patent: 4837853 (1989-06-01), Heck
patent: 4952888 (1990-08-01), Izumi

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