CMOS output buffer having a high current driving capability with

Details CMOS output buffer having a high current driving capability with CMOS output buffer having a high current driving capability with

1996-11-20

1998-12-29

Santamauro, Jon

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Output switching noise reduction

326 83, 326 87, H03K 190948, H03K 1716

Patent

active

058545603

ABSTRACT:
In a preferred embodiment of the present invention an output buffer includes high current drivers that avoids a short circuit current. Further, the inventive output buffer only produces a slight level of ground bounce (noise). In particular, the buffer comprises first and second drivers for driving a terminal to a voltage corresponding to a high logic value of a first output signal and a low logic value of a second output signal, respectively. Typically, the first driver includes a plurality of PMOS pull-up transistors and the second driver includes a plurality of NMOS pull-down transistors. In addition, first and second predriver circuits, connected to the first and second drivers, respectively, are included. In operation, the first predriver receives the complement (inverse) of the first output signal and a delayed output of the second predriver. The second predriver receives the complement of the second output signal and the delayed output of the first predriver. In this manner, all pull-up (or pull-down) transistors are completely turned on before the pull-down (or pull-up) transistors are sequentially turned off. Therefore, a short-circuit current that may occur during a logic transition in the output signal is eliminated.

REFERENCES:
patent: 4954729 (1990-09-01), Urai
patent: 5001369 (1991-03-01), Lee
patent: 5124579 (1992-06-01), Naghshineh
patent: 5541541 (1996-07-01), Salamina et al.

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