Method for forming metallization in semiconductor devices with a

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

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438669, 438636, 438631, 438760, H01L 21469, H01L 21312

Patent

active

058541268

ABSTRACT:
A method for forming a plurality of electrically conductive wires on a substrate. The method includes forming a relatively non-planar metal layer over a surface of the substrate. A self-planarizing material is deposited over the metal layer. The self-planarizing material forms a planarization layer over the surface of the metal layer. The planarization layer has a surface relatively planar compared to the relatively non-planar metal layer. A photoresist layer is deposited over the surface of the planarization layer. The photoresist layer is patterned with a plurality of grooves to form a mask with such grooves exposing underling portions of the planarization layer. The photoresist mask is used as a mask to etch grooves in the exposed portions of the planarization layer and thereby form a second mask. The second mask exposes underling portions of the relatively non-planar metal layer. The second mask is used to etch grooves in the relatively non-planar conductive metal layer and thereby form the plurality of electrically conductive wires in the metal layer. The wires are separated from each other by the grooves formed in the relatively non-planar metal layer. The planarization layer is formed by a spinning-on an organic polymer, for example an organic polymer having silicon, or a flowable oxide, or a hydrogensilsequioxane, or divinyl-siloxane-benzocyclobutene. The metal layer is etched using reactive ion etching. The planarization layer is removed using a wet chemical etch.

REFERENCES:
patent: 4758305 (1988-07-01), Bonifield et al.
patent: 4770739 (1988-09-01), Orvek et al.
patent: 5126289 (1992-06-01), Ziger
patent: 5264076 (1993-11-01), Cuthbert et al.

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