Programmable non-volatile memory cell and method of forming a pr

Details Programmable non-volatile memory cell and method of forming a pr Programmable non-volatile memory cell and method of forming a pr

1996-11-04

1998-03-10

Monin, Donald

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257410, 257435, H01L 29792

Patent

active

057264716

ABSTRACT:
A method of reducing undesired electron depletion through sidewalls of a floating gate of a floating gate transistor comprising providing a non-oxide or oxynitride layer over said sidewalls. Integrated circuitry including a non-volatile field effect transistor includes, a) a floating gate transistor having a gate construction and a pair of opposing source/drain regions, the gate construction having at least one sidewall; b) a shielding layer over the gate sidewall; and c) a dielectric layer on the shielding layer, the dielectric layer being of a different material than the shielding layer. The shielding layer might be provided over an oxide layer previously provided on sidewalls of the gate construction. The shielding layer might be provided over sidewall spacers previously provided relative to sidewalls of the gate construction. Example and preferred shielding layer materials include Si.sub.3 N.sub.4, oxynitride compounds, and aluminum.

REFERENCES:
patent: 5068697 (1991-11-01), Noda et al.
patent: 5422504 (1995-06-01), Chang et al.
patent: 5534456 (1996-07-01), Yuan et al.
patent: 5614748 (1997-03-01), Nakajima et al.

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