Semiconductor memory device

Static information storage and retrieval – Read/write circuit

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36523001, G11C 1300

Patent

active

054973465

ABSTRACT:
An object of the present invention is to provide a semiconductor memory device capable of reducing a delay in the transmission of a chip select signal, which is developed inside a chip and providing very fast access times for chip selection. A chip select terminal to which a chip select signal is externally supplied, is electrically connected to an inner conductive pattern. A first input circuit is disposed as a pre-stage circuit so as to be electrically connected to each of a plurality of inner circuits. The chip select signal supplied to the chip select terminal from the outside of the chip is directly transmitted to each of the first input circuits through the inner conductive pattern so as to be supplied to each of the inner circuits.

REFERENCES:
patent: 4694428 (1987-09-01), Matsumura
"Foundation to Practical Application to Memory", by Kazuo Nakamura, published by CQ (issued on May, 1987).

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