Boots – shoes – and leggings
Patent
1993-06-08
1995-03-07
Bowler, Alyssa H.
Boots, shoes, and leggings
364131, 364133, 364134, 3642281, 364229, 3642294, 3642305, 3642306, 3642329, 364DIG1, G06F 1300
Patent
active
053966414
ABSTRACT:
A process in memory chip has been designed to combine memory and computation on the same integrated circuit in a way that makes use of the bandwidth that results from the combination. The chip contains multiple single-bit computational processors that are all driven in parallel. Error correction logic is also incorporated into the chip to detect and correct errors in memory, data as they occur.
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Iobst Kenneth W.
Resnick David R.
Wallgren Kenneth R.
Bowler Alyssa H.
Nguyen Dzung C.
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