Semiconductor static random access memory device having memory c

Static information storage and retrieval – Systems using particular element – Flip-flop

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36518911, 36523006, G11C 1100

Patent

active

057711909

ABSTRACT:
A static type random access memory cell stores a data bit supplied from a bit line pair through two p-channel enhancement type access transistors gated by a word line in a two-stable latch circuit powered with a positive high power voltage and a positive low power voltage, and the positive low power voltage is higher than an active level on the word line so that the two-stable latch circuit certainly changes the state depending upon the logic level of a write-in data bit.

REFERENCES:
patent: 5303190 (1994-04-01), Pelley, III
patent: 5418749 (1995-05-01), Suda et al.
patent: 5453949 (1995-09-01), Wiedmann et al.
patent: 5574687 (1996-11-01), Nakase
H. Okamura et al., "A 1 ns, 1 W, 2.5 V, 32 kb NTL-CMOS SRAM Macro Using a Memory Cell with PMOS Access Transistors", IEEE Journal of Solid-State Circuits, vol. 30, No. 11, Nov. 1995 pp. 1196-1202.

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