Electrical computers and digital processing systems: memory – Address formation – Generating a particular pattern/sequence of addresses
Patent
1996-11-25
1999-06-29
Chan, Eddie P.
Electrical computers and digital processing systems: memory
Address formation
Generating a particular pattern/sequence of addresses
711213, 711214, 711219, 711220, G06F 506
Patent
active
059182520
ABSTRACT:
A method and apparatus for generating a modulo address for accessing a circular buffer. The method and apparatus accept as inputs a length L of the circular buffer, a current address A of the circular buffer, and an offset M between the current address and the next address to be generated. The offset M may be positive or negative. During operation of the present invention, the current address A first is broken down into a base address B and an offset from the base address a. Then, in accordance with the length L and the offset M, the invention determines an absolute offset and a wrapped offset. One of these offsets is added to the base address B to generate a next address for the circular buffer. The determination of which offset to add to the base address B is made by performing one of two comparisons. Specifically, either the absolute offset is compared to a predetermined value indicating the beginning of the circular buffer or the absolute offset is compared to a predetermined value indicating the end of the circular buffer, depending on a sign of the offset M. In a second embodiment of the invention, one of the offsets is added to the base address B in accordance with a Wrap flag determined by the circuit.
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patent: 5448706 (1995-09-01), Fleming et al.
patent: 5623621 (1997-04-01), Garde
patent: 5649146 (1997-07-01), Riou
patent: 5659700 (1997-08-01), Chen et al.
Chen Hwang-Chung
Hsu Shih-Chang
Chan Eddie P.
Nguyen Than V.
Winbond Electronics Corporation
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